Power semiconductor device

ABSTRACT

In order to provide semiconductor device modules which are capable of solving problems caused by the presence of the control board, and facilitating electric connection between power semiconductor elements and main circuit terminals and lightening restrictions on the number and layout of the power semiconductor elements, a control emitter relay terminal, a gate relay terminal, and a relay terminal are connected to a control board disposed above an edge portion of the semiconductor device module. The control board has control circuitry and elements for controlling operations of an IGBT device and a diode device, and also has a control emitter interconnection pattern to which the control emitter relay terminal is connected and a gate interconnection pattern to which the gate relay terminal is connected, where these interconnection patterns are connected to control circuitry.

TECHNICAL FILED

The present invention relates to power semiconductor devices andparticularly to a power semiconductor device which has a plurality ofsemiconductor device modules.

BACKGROUND ART

FIG. 11 is a perspective view that shows a semiconductor device module90 as an example of a conventional power semiconductor device. FIG. 11is partially broken to show the internal structure.

As shown in FIG. 11, the semiconductor device module 90 has powersemiconductor elements, not shown, that are accommodated in a box-likeresin case 11, and a control board CB disposed above the powersemiconductor elements.

The control board CB has control circuitry and elements for controllingthe operation of the power semiconductor elements, such as an IGBT(Insulated Gate Bipolar Transistor) device and a diode device, and thecontrol board CB is contained inside to allow the semiconductor devicemodule 90 to work as an IPM (Intelligent Power Module).

The control board CB is disposed to almost entirely cover the area wherethe power semiconductor elements are located and is electricallyconnected to the power semiconductor elements through connecting meansnot shown. On its upper main surface, a derive terminal OT is providedto externally output the operating conditions of the power semiconductorelements inside and to supply power to the control circuitry; the deriveterminal OT protrudes from the top surface of the resin case 11 so thatit can be electrically connected to the outside. The resin case 11 issealed with resin material, though the drawing does not show the resin.

Main circuit terminals M1 and M2 for input/output of the main currentflowing in the internal power semiconductor elements are provided in aperipheral portion not covered with the control board CB and protrudefrom the peripheral portion of the top surface of the resin case 11 sothat it can be electrically connected to the outside.

While the semiconductor device module 90 is structured as shown above,there are other semiconductor device modules in which the control boardCB is located on the same plane as the power semiconductor elements.

While the conventional semiconductor device module 90 contains thecontrol board BC inside as shown above, this structure may restrict theposition of the main circuit terminals M1 and M2, or the lead paths ofthe main circuit terminals M1 and M2 to be longer, which increases theinductance and may affect the performance of the semiconductor devicemodule by, e.g. increasing the surge voltage.

Also, in a semiconductor device module in which the control board isplaced on the same plane as the power semiconductor elements, the areafor installation of the power semiconductor elements is limited, whichlimits the number and layout of the power semiconductor elementsinstalled.

DISCLOSURE OF THE INVENTION

The present invention has been made to solve the problems shown above,and an object of the invention is to provide a semiconductor devicemodule which is capable of solving problems caused by the presence ofthe control board, and facilitating the electric connection between thepower semiconductor elements and main circuit terminals and lighteningrestrictions on the number and layout of the power semiconductorelements.

According to a first aspect of the invention, a semiconductor devicemodule includes: a plurality of semiconductor device modules eachcomprising a resin case, a power semiconductor element accommodated insaid resin case, a main circuit terminal protruding outward from saidresin case and in which a main current of said power semiconductorelement flows, and a control terminal protruding outward from said resincase and to which a control signal for controlling said powersemiconductor element is inputted; a bus bar electrically connecting incommon said main circuit terminals of said plurality of semiconductordevice modules, said main circuit terminals being arranged in line; anda control board disposed to at least cover a disposed area of saidprotruding control terminals of said plurality of semiconductor devicemodules and electrically connected to said control terminals.

In accordance with the first aspect of the semiconductor device moduleof the invention, the lead path of the of the power semiconductorelement can be selected freely because the control board is disposedoutside the semiconductor device module. This facilitates makingelectric connection between the power semiconductor element and the maincircuit terminal. Providing the control board outside also lightensrestrictions on the number and layout of the power semiconductorelements installed. Furthermore, the plurality of semiconductor devicemodules are arranged so that their respective main circuit terminals arealigned and the main circuit terminals are electrically connected incommon by the bus bar, so that the bus bar functions also as means formechanically connecting the plurality of semiconductor device modules,which offers a structurally stronger power semiconductor device withoutthe need for specialized connecting means.

According to a second aspect of the semiconductor device module of theinvention, said control terminal protrudes outward from an edge portionof said resin case, and said control board is disposed to cover only anarea over said edge portions of said plurality of semiconductor devicemodules from which said control terminals protrude.

According to the second aspect of the semiconductor device module of theinvention, the control board is disposed to cover only the area over theedge portions of the plurality of semiconductor device modules fromwhich the control terminals protrude, which allows the control board tobe sized smaller.

According to a third aspect of the semiconductor device module of theinvention, said plurality of semiconductor device modules are arrangedin rows so that their respective said edge portions from which saidcontrol terminals protrude lie next to each other, and said controlboard is disposed to extend over said edge portions across from one saidrow to another of said plurality of semiconductor device modules.

According to the third aspect of the semiconductor device module of theinvention, the plurality of semiconductor device modules are arranged sothat the edge portions from which their respective control terminalsprotrude lie next to each other; the control terminals thus stand closeto each other and the control board can be small in size.

According to a fourth aspect of the semiconductor device module of theinvention, said control board is disposed above said bus bar and issized to cover almost all the region where said plurality ofsemiconductor device modules are disposed.

According to the fourth aspect of the semiconductor device module of theinvention, the control board is sized to cover almost all area where theplurality of semiconductor device modules are disposed and the controlboard is placed above the bus bar, which eliminates the need to formopening etc. in the control board so that the main circuit terminals canpass through there, thus offering a strong and firm control board. Thisstructure also increases the freedom of the layout of the plurality ofsemiconductor device modules.

According to a fifth aspect of the semiconductor device module of theinvention, said control board is disposed to cover said plurality ofsemiconductor device modules except in an area where said main circuitterminals are disposed.

According to the fifth aspect of the semiconductor device module of theinvention, the structure increases the freedom of the layout of theplurality of semiconductor device modules.

According to a sixth aspect of the semiconductor device module of theinvention, said control board has an interconnection patternelectrically connecting said control terminals in common, and saidinterconnection pattern has a non-loop shape in a plan view.

According to the sixth aspect of the semiconductor device module of theinvention, the interconnection pattern has a non-loop shape in the planview, which prevents the problem that the main circuit current flowingthrough the main circuit terminals exerts influence to cause a circularflow of induced current which would vary characteristics of the powersemiconductor elements.

According to a seventh aspect of the invention, a semiconductor devicemodule comprises: a plurality of semiconductor device modules eachcomprising a resin case, a power semiconductor element accommodated insaid resin case, and a control terminal protruding outward from an edgeportion of said resin case and to which a control signal for controllingsaid power semiconductor element is inputted; and a control boardelectrically connected to said control terminals; wherein said pluralityof semiconductor device modules are arranged in rows so that theirrespective said edge portions from which said control terminals protrudelie next to each other, and said control board is disposed to extendover said edge portions across from one said row to another of saidplurality of semiconductor device modules.

According to the seventh aspect of the semiconductor module of theinvention, the plurality of semiconductor device modules are arranged sothat their edge portions from which the respective control terminalsprotrude lie next to each other; thus the control terminals stand closeto each other and the control board can be small in size.

The objects, features, aspects and advantages of the present inventionwill become more apparent from the following detailed description andthe accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view showing the structure of a preferredembodiment of the power semiconductor device of the invention.

FIG. 2 is a diagram showing the connection of the power semiconductorelements.

FIG. 3 is a perspective view showing the structure of the preferredembodiment of the power semiconductor device of the invention.

FIG. 4 is a plan view showing the structure of a control board of thepower semiconductor device of the invention.

FIG. 5 is a plan view showing the structure of the control board of thepower semiconductor device of the invention.

FIG. 6 is a plan view showing an example of arrangement of semiconductordevice modules.

FIG. 7 is a perspective view showing the structure of a semiconductordevice module.

FIG. 8 is a diagram showing the connection of power semiconductorelements.

FIG. 9 is a perspective view showing the structure of a variation of thepreferred embodiment of the power semiconductor device of the invention.

FIG. 10 is a perspective view showing the structure of a variation ofthe preferred embodiment of the power semiconductor device of theinvention.

FIG. 11 is a perspective view showing the structure of a conventionalsemiconductor device module.

BEST MODE FOR CARRYING OUT THE INVENTION Preferred Embodiment

Device Structure.

FIG. 1 is a perspective view that shows a semiconductor device module100 as a preferred embodiment of the power semiconductor device of thepresent invention. FIG. 1 is partially broken to show the internalstructure.

In FIG. 1, a bottom substrate 12 has a rectangular shape in the planview and is made of a material having good thermal conductivity, e.g.metal, and an insulating substrate 3 is provided on the bottom substrate12, and a set of one IGBT device 1 and one diode device 2 are providedon the insulating substrate 3. A box-like resin case 11 surrounds thebottom substrate 12, and a resin material is sealed in the space definedby the bottom substrate 12 and the resin case 11. The drawing does notshow the resin.

FIG. 2 shows the connection of the IGBT device 1 and the diode device 2.The diode device 2 is connected in parallel with the IGBT device 1 insuch a direction that the forward current flows back to the IGBT device1. The IGBT device 1 has a main collector electrode and a main emitterelectrode that are externally connected through main circuit terminalsM1 and M2 and a control emitter electrode and a gate electrode that areexternally connected respectively through a control emitter relayterminal 7 and a gate relay terminal 8. The control emitter relayterminal 7 and the gate relay terminal 8 can be referred to as controlterminals since control signals are inputted to them.

In FIG. 1, in the peripheral portion of the bottom substrate 12, a relayterminal plate 6 is disposed along the insulating substrate 3, with theIGBT device 1 located closer to the edge on the side of the relayterminal plate 6 on the bottom substrate 12.

The relay terminal plate 6 has electrically insulated control emitterpad 71 and gate pad 81 formed on a main surface of an insulatingsubstrate, for example. The control emitter pad 71 is electricallyconnected to the control emitter electrode (or the emitter electrode) ofthe IGBT device 1 through wire interconnection WR (aluminum wire) andthe gate pad 81 is electrically connected to the gate electrode of theIGBT device 1 through wire interconnection WR. The emitter electrode ofthe IGBT device 1 is electrically connected to the anode of the diodedevice 2 through wire interconnection WR.

The control emitter relay terminal 7 and the gate relay terminal 8,which vertically extend, are connected respectively to the controlemitter pad 71 and the gate pad 81; the control emitter relay terminal 7and the gate relay terminal 8 protrude outward from the edge portion ofthe upper surface of the resin case 11.

The control emitter relay terminal 7 and the control emitter pad 71, andthe gate relay terminal 8 and the gate pad 81, are connected bysoldering, for example.

The structure of FIG. 1 also has a relay terminal 9 that protrudes alongwith the control emitter relay terminal 7 and the gate relay terminal 8.While the relay terminal 9 is connected to a pad 91 that is provided onthe relay terminal plate 6 alongside the control emitter pad 71 and thegate pad 81, the pad 91 is connected to nowhere. The pad 91 and therelay terminal 9 are used when necessary, which are connected, e.g. to acurrent sense electrode of the IGBT device 1. The current senseelectrode is an electrode to which a current (sense current) flows whichcorresponds to a very tiny fraction (much less than one thousandth) ofthe current flowing to the main emitter electrode; by detecting thesense current, the IGBT device 1 can be protected from surge current andshort circuit.

While the user will decide whether to detect the sense current,previously providing the pad 91 and the relay terminal 9 offers the userconvenience. The module may be provided with only the pad 91, in whichcase the relay terminal 9 will be connected thereto when required.

The control emitter relay terminal 7, the gate relay terminal 8, and therelay terminal 9 are connected by, e.g. soldering, to the control board10 disposed above the edge of the semiconductor device module 100.

The control board 10 has control circuitry (not shown) and elements forcontrolling operation of the IGBT device 1 and the diode device 2, andalso has a control emitter interconnection pattern to which the controlemitter relay terminal 7 is connected and a gate interconnection patternto which the gate relay terminal 8 is connected, where theseinterconnection patterns are connected to the control circuitry.

Although FIG. 1 does not show main circuit terminals for externallyconnecting the main collector electrode and the main emitter electrodeof the IGBT device 1, the lead paths of the main circuit terminals canbe relatively freely selected since the control board 10 is disposedoutside the semiconductor device module 100 to partially cover its edgeportion.

Next, a further function of the control board 10 is described referringto FIG. 3. While the control board 10 of FIG. 1 is engaged with thecontrol emitter relay terminal 7, the gate relay terminal 8, and therelay terminal 9 which protrude from one of the four edges of the topsurface of the semiconductor device module 100, it may be disposed overthe edges of two semiconductor device modules 100 as shown in FIG. 3 andengaged with the control emitter relay terminals 7, gate relay terminals8 and relay terminals 9 which protrude at the respective edges of thetwo semiconductor device modules 100 (hereinafter these relay terminalsmay be referred to as groups of relay terminals).

In this structure, the control emitter relay terminals 7 of the twosemiconductor device modules 100, and their gate relay terminals 8, i.e.relay terminals of the same kind, are electrically connected in commonin the control board 10, so that the two semiconductor device modules100 can be controlled in parallel. Such a structure in which a pluralityof semiconductor device modules are controlled in parallel is called amodule unit.

In FIG. 3, the control board 10 is supported by supports SP provided atthe four corners and a derive terminal OT is provided on its upper mainsurface to externally output operating conditions of the powersemiconductor elements inside and to supply power to the controlcircuitry (not shown).

FIG. 4 is a plan view, seen from above, of the control board 10 engagingwith the two semiconductor device modules 100, and FIG. 5 is its planview seen from below. FIGS. 4 and 5 are partially broken to show theinternal structure of the control board 10.

As shown in FIG. 4, the control board 10 has a gate interconnectionpattern 82 formed on its upper main surface side to connect therespective gate relay terminals 8, and it also has, as shown in FIG. 5,an emitter interconnection pattern 72 formed on its lower main surfaceside to connect the respective control emitter relay terminals 7, andthe two main surfaces are covered by an insulator. When it is necessaryto connect the respective relay terminals 9, a multi-layer board is usedand an interconnection pattern for mutually connecting the relayterminals 9 is formed in a layer between the gate interconnectionpattern 82 and the emitter interconnection pattern 72.

Needless to say, the emitter interconnection pattern 72 is formed insuch a manner that the gate relay terminals 8 and the emitterinterconnection pattern 72 will not come in contact with each other, andthe interconnection patterns and the relay terminals are electricallyconnected firmly by soldering etc.

As for another structure, other than that shown in FIG. 3, forconnecting two semiconductor device modules 100 in parallel, twosemiconductor device modules 100 may be arranged so that theirrespective relay terminal groups are aligned in a line and connectedwith a control board that connects the relay terminals of the same kindsin common. A structure expanded on the basis of this structure will bedescribed later referring to FIG. 6.

Now, referring back to FIG. 3, the semiconductor device module 100 onthe left side in FIG. 3 has a group of relay terminals disposed at theright edge and the semiconductor device module 100 on the right side hasa group of relay terminals disposed at the left edge.

The area of the control board can thus be reduced by arranging the twoparallel-controlled semiconductor device modules 100 so that theirrespective relay terminal groups are placed close; for this purpose, thetwo semiconductor device modules 100 are arranged in opposite directionsand in parallel to each other so that their respective edges from whichthe relay terminal groups protrude lie next to each other.

That is to say, in FIG. 3, the semiconductor device module 100 on theleft side in the drawing has its control emitter relay terminal 7located at the farther end and the semiconductor device module 100 onthe right side in the drawing has its relay terminal 9 located at thefarther end; the two semiconductor device modules 100 are thus arrangedin opposite directions.

While FIG. 3 shows two semiconductor device modules 100 that arecontrolled in parallel with their respective relay terminal groupselectrically connected in common by the control board 10, more than twosemiconductor device modules 100 can be controlled in parallel; forexample, as shown in FIG. 6, a total of six semiconductor device modules100 may be connected to form a module unit by using a control board 20that can connect three semiconductor device modules 100 on each side.

While the lead paths of the main circuit terminals M1 and M2 can befreely selected as mentioned before, controlling a plurality ofsemiconductor device modules in parallel requires electricallyconnecting in common the main circuit terminals of the same kinds, M1and M2. As for means for making the connection, in the arrangement ofsemiconductor device modules shown in FIG. 6, for example, it isefficient to dispose strip-like bus bars made of conductor plate asshown by one-dot chain line, so as to mutually connect main circuitterminals of the same kind in a straight line; therefore it is desiredthat main circuit terminals of the same kind be arranged in line withoutany main circuit terminals of a different kind interposed between them.In FIG. 6, the plurality of main circuit terminals M1 and M2 are alignedin respective lines in parallel.

Needless to say, this is desirable also for a semiconductor devicemodule having a plurality of main circuit terminals M1 and M2. Aspecific structure of the bus bars is shown in FIG. 10.

The bus bar not only electrically connects main circuit terminals of thesame kind in common but also functions as means for mechanicallyconnecting the plurality of semiconductor device modules, thus providinga rigidly-structured module unit without a need for specializedconnecting means.

While FIG. 6 shows semiconductor device modules 100 arranged in twolines, they may be arranged only in one line. Anyway, a plurality ofsemiconductor device modules can be controlled in parallel by using acontrol board that can connect the same kind of relay terminals incommon.

While the semiconductor device module 100 shown in FIG. 1 has one IGBTdevice 1 and one diode device 2 and one group of relay terminals forthem, the structure of the semiconductor device module is not limited tothis structure; for example, as shown in FIG. 7, a semiconductor devicemodule 100A may be provided with a plurality of sets each including anIGBT device 1 and a diode device 2, and one group of relay terminals foreach set.

In this case, the control board 30 is formed to be connected to thethree groups of relay terminals and the relay terminal plate 6A isformed so that three control emitter pads 71, three gate pads 81 andthree pads 91 can be provided thereon.

This structure is provided with a plurality of sets of IGBT devices 1and diode devices 2, the same number of relay terminal groups, and thesame number of sets of the main circuit terminals M1 and M2.

While the semiconductor device module 100A shown in FIG. 7 has aplurality of sets of IGBT devices 1 and diode devices 2, with one groupof relay terminals for each set, six IGBT devices 1 may be connected inparallel as shown in FIG. 8, with one diode device 2 connected inparallel to each.

In this case, the gate electrodes of the individual IGBT devices 1 areconnected to the gate relay terminal 8 in common and their controlemitter electrodes are connected to the control emitter relay terminal 7in common. The main collector electrodes and the main emitter electrodesof the individual IGBT devices 1 are connected to the main circuitterminals M1 and M2 in common.

In this structure, one group of relay terminals and one set of maincircuit terminals M1 and M2 are provided for the six sets of IGBTdevices 1 and diode devices 2.

Functions and Effects

As described above, in the semiconductor device module 100, the controlboard 10 is disposed outside the semiconductor device module 100 andpartially covers the area above the edge of the semiconductor devicemodule 100, so that the lead paths of the main circuit terminals can befreely selected to externally connect the main collector electrode andthe main emitter electrode of the IGBT device 1. The power semiconductorelement and the main circuit terminals can thus be electricallyconnected with ease.

Furthermore, disposing the control board 10 outside lightensrestrictions on the number and layout of the installed powersemiconductor elements.

Moreover, since the control emitter relay terminal 7 and the gate relayterminal 8 protrude outward from the edge portion of the upper surfaceof the resin case 11, a plurality of semiconductor device modules 100can be controlled in parallel, with the plurality of semiconductordevice modules 100 arranged in two rows in parallel in such a way thattheir respective relay terminal groups face each other, and with thecontrol board 10 engaging with the relay terminal groups of theplurality of semiconductor device modules 100 to mutually connect therelay terminals of the same kinds in common in the control board 100.

Variation 1.

In the preferred embodiment shown above, the control board 10 is engagedwith the semiconductor device module 100 that has a group of relayterminals (i.e. the control emitter relay terminal 7, the gate relayterminal 8 and the relay terminal 9) that protrude from one of the fouredge portions; however, the control board will be formed in a differentmanner when used with semiconductor device modules having a plurality ofrelay terminal groups.

FIG. 9 shows semiconductor device modules 200 each having relay terminalgroups protruding from opposite two of its four edge portions. The twosemiconductor device modules 200 on the right and left sides in FIG. 9have the same structure.

In FIG. 9, each semiconductor device module 200 has relay terminalgroups on the two, right and left, edge portions and two sets of maincircuit terminals M1 and M2, and M11 and M12.

The main circuit terminals M1 and M2 form a set with the relay terminalgroup on the left side in the drawing and the main circuit terminals M11and M12 form a set with the relay terminal group on the right side.

A control board 40 is provided to cover the two semiconductor devicemodules 200 except in the areas where the main circuit terminals M1 andM2 and the main circuit terminals M11 and M12 are located.

The control board 40 has an interconnection pattern PT which engageswith the four relay terminal groups to connect the relay terminals ofthe same kind in common, so that the two semiconductor device modules200 can be controlled in parallel. The use of this control board 40increases the freedom of layout of the semiconductor device modules.

While the shape of the interconnection pattern PT shown with broken linein FIG. 9 is just an example, thus forming the interconnection patternnot in a loop shape similar to the shape of the control board 40 in planview but in a non-loop shape leaving some area where the pattern isabsent prevents the problem that the main circuit current flowingthrough the main circuit terminals M1 and M2 and the main circuitterminals M11 and M12 exerts influence to cause a circular flow ofinduced current to vary the gate characteristic.

In the interconnection pattern PT, as described referring to FIG. 4, theemitter interconnection pattern 72 is formed on the lower main surfaceside and the gate interconnection pattern 82 is formed on the upper mainsurface side, so that short circuit between the interconnection patternscan be prevented.

In the structure shown above, the control board 40 connects twosemiconductor device modules 200; however, needless to say, the controlboard 40 can be formed larger in size to connect a larger number ofsemiconductor device modules 200.

Variation 2.

While the control board 10 described in the preferred embodiment issuited for parallel control of a module unit in which the semiconductordevice modules 100 are arranged in two rows in parallel so that therelay terminal groups stand adjacent to each other, restrictions on thelayout of the semiconductor device modules can be lightened by adoptingthe control board 50 shown in FIG. 10.

In FIG. 10, a plurality of semiconductor device modules 100 are arrangedin two rows and the control board 50 is disposed above them and engagedwith the individual relay terminal groups (i.e. the control emitterrelay terminal 7, the gate relay terminal 8, and the relay terminal 9).

While the semiconductor device modules 100 are arranged so that the maincircuit terminals of the same kind are aligned, the relay terminalgroups do not face each other between the rows.

This is possible because the control board 50 has an area which almostentirely covers the arrangement of the semiconductor device modules 100and it can be engaged with the relay terminal groups anywhere in thisarea.

The restrictions on the arrangement of the semiconductor device modules100 can thus be lightened; however, it is desired that the main circuitterminals of the same kind be arranged in line since controlling aplurality of semiconductor device modules 100 in parallel requiresconnecting the main circuit terminals of the same kind in common.

That is to say, as shown in FIG. 10, in the individual rows of thesemiconductor device modules 100, bus bars B1 and B2 are provided toelectrically connect in common the main circuit terminals M1 and M2aligned in lines.

For the provision of the bus bars B1 and B2, the control board 50 ispositioned in a higher position than the bus bars B1 and B2; the controlboard 50 can be supported in a stable manner on supports SP provided onthe semiconductor device modules 100.

Also, all the semiconductor device modules 100 can be controlled inparallel by connecting the bus bars B1 in common, and the bus bars B2 incommon.

The control board 50 has no opening and is hence structurally strongerand the bus bars B1 and B2 thus connect the main circuit terminals M1and M2, which provides a structurally stronger module unit.

While the invention has been described in detail, the foregoingdescription is in all aspects illustrative and not restrictive. It isunderstood that numerous other modifications and variations can bedevised without departing from the scope of the invention.

What is claimed is:
 1. A power semiconductor device, comprising: aplurality of semiconductor device modules each comprising, a resin case,a power semiconductor element accommodated in said resin case, a maincircuit terminal protruding outward from said resin case and in which amain current of said power semiconductor element flows, and a controlterminal protruding outward from said resin case and to which a controlsignal for controlling said power semiconductor element is inputted; abus bar electrically connecting in common said main circuit terminals ofsaid plurality of semiconductor device modules, said main circuitterminals being arranged in line; and a control board disposed to atleast cover a disposed area of said protruding control terminals of saidplurality of semiconductor device modules and electrically connected tosaid control terminals.
 2. The power semiconductor device according toclaim 1, wherein said control terminal protrudes outward from an edgeportion of said resin case, and said control board is disposed to coveronly an area over said edge portions of said plurality of semiconductordevice modules from which said control terminals protrude.
 3. The powersemiconductor device according to claim 2, wherein said plurality ofsemiconductor device modules are arranged in rows so that theirrespective said edge portions from which said control terminals protrudelie next to each other, and said control board is disposed to extendover said edge portions across from one said row to another of saidplurality of semiconductor device modules.
 4. The power semiconductordevice according to claim 1, wherein said control board is disposedabove said bus bar and is sized to cover almost all of the region wheresaid plurality of semiconductor device modules are disposed.
 5. Thepower semiconductor device according to claim 1, wherein said controlboard is disposed to cover said plurality of semiconductor devicemodules except in an area where said main circuit terminals aredisposed.
 6. The power semiconductor device according to claim 5,wherein said control board has an interconnection pattern electricallyconnecting said control terminals in common, and said interconnectionpattern has a non-loop shape in a plan view.
 7. A power semiconductordevice, comprising: a plurality of semiconductor device modules eachcomprising, a resin case, a power semiconductor element accommodated insaid resin case, and a control terminal protruding outward from an edgeportion of said resin case and to which a control signal for controllingsaid power semiconductor element is inputted; and a control boardelectrically connected to said control terminals; said plurality ofsemiconductor device modules being arranged in rows so that theirrespective said edge portions from which said control terminals protrudelie next to each other, said control board being disposed to extend oversaid edge portions across from one said row to another of said pluralityof semiconductor device modules.